Write Back Cache module statistics

This page describes the statistic collected by the module as defined in the Statistic Capability. As defined in the capability, statistics are 64bit unsigned interger counters.

Below is a short description of each counter:

  • accesses
    Total number of accesses
  • accesses_read
    Total number of read accesses
  • accesses_write
    Total number of write accesses
  • accesses_prefetch
    Total number of prefetch accesses
  • accesses_evict
    Total number of evict accesses
  • hits
    Total number of hits
  • hits_read
    Total number of read hits
  • hits_write
    Total number of write hits
  • hits_prefetch
    Total number of pretech hits
  • hits_evict
    Total number of evict hits
  • misses
    Total number of misses
  • misses_read
    Total number of read misses
  • misses_write
    Total number of write misses
  • misses_prefetch
    Total number of prefetch misses
  • misses_evict
    Total number of evict misses
  • writebacks
    Total number of writebacks
  • writebacks_read
    Total number of read writebacks
  • writebacks_write
    Total number of write writebacks
  • writebacks_prefetch
    Total number of prefetch writebacks
  • writebacks_evict
    Total number of evict writebacks
 
modules/cycle/network/cachewb/statistics.txt · Last modified: 2007/09/10 18:01 by girbal     Back to top
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