The finite state automaton below represent the possible states associated with the MESI protocol dealing with cache coherency in CMP environment based on a snooping bus.

• Coherency Protocols

Read and Write requests are put in the cache queue. Those cache queue entry have a large amount of different states: For instance a read request will become a read miss, then a read miss that has been requested to the memory, then a read miss that has been answered by the memory, and the data will be sent back to the cpu.

The Figure 6.3 present the different possible values of this cache queue state. The green and red boxes represents the possible cache request states. The blue rounded boxes represents the different functions where the transition occurs in the cache module.
The black filled boxes occurs when the request is removed from the queue.