Simulators

This section provide some information on the simulators available in the public repository. Those simulators are built by assembling components presented in the Modules and the Services sections.

The different tools (including third party) required to build up those simulators are described in the Tools section. This section also includes the tools required to build up the simulated benchmarks.

UNISIM proposes two possible level of abstraction for building simulators:

• Cycle-level: Cycle-level simulators are cycle accurate models characterized by an high accuracy on performance evaluation comparing to the real hardware. Such simulators require a lot of communications between modules composing the simulator that is slowing down the simulation.
• TLM-level: Transaction-level simulators are mostly based on functional models and focus on the communication, which is the real bottleneck of CMP architectures. TLM simulators may be less accurate than their cycle-level counterparts, but will run much more faster.

• User-level simulators are simulating benchmarks compiled for the target architecture. All the system calls of the benchmarks (open, read, write, close, ...) are run natively on the host machine by translating them from the target architecture to the host architecture. Such simulators usually do not handle complex task performed by a real operating system scheduler such as forking new processes during a simulation. They are however much more easier to write down than system-level simulators which require to model the whole device tree needed by the operating system.
• System-level simulators are simulating the whole system including the operating system and the peripherals. Those simulators are loading a full operating system. Such a level of simulation does not cope well with cycle level simulation, as simulating a whole system at cycle level will be terribly slow. All the system-level simulators presented in this section are TLM-level simulators.