System BUS module

The system bus module allow to route memory requests in a CMP environment based on a bus architecture. The system bus module is compatible with bus snooping.

The system bus module has a dedicated pair of ports to connect from/to the memory: inMEM and outMEM, and some pair of ports to connect from/to some cpus: inCPU[i] and outCPU[i] as shown in Figure below. Those memory an cpu ports may not be connected directly, with some caches inbetwen.

The purpose of the system bus is to forward every message received on one of its input port to every output port but the one corresponding to the incoming input port. If several messages are received in the same cycle, the messages received from the memory have the highest priority, and messages coming from the CPUs follow a round robin policy to avoid starvation.

• Parameters of the module: Details on the module template parameters.
• Interface of the module: Defines the module communication ports.
• Internals of the module: Some details about the main internal data structures and algorithms.
• Statistics of the module: List of the statistics gathered by the module.

• Source file in the repository: bus.sim

• Bus module reference manual

• Single-core PowerPC405 simulator
• Single-core Arm v5 te simulator
• Shared Memory PowerPC405 CMP