====== UNISIM News ======
A full day tutorial on CellSim: a Modular Simulator for Heterogeneous Chip Multiprocessors will be presented at the Parallel Architectures and Compilation Techniques (PACT) workshop session in Brasov, Romania on September 15-19, 2007. This Cell simulator is written in the UNISIM environment.
The full-system simulator of a [[simulators:tlm:mac-g3:snapshot_2007_08:|PowerPC G3 simulator]] has been released as a standalone release. This simulator includes a MPC755 microprocessor, memories, the MPC107 chipset, a Programmable Interrupt Controller and a PIIX4 IDE controller. The simulator also includes a few devices such as some IDE disks and a Framebuffer Display. \\
This simulator is currently able to boot up Linux for PowerPC and to run most of the Specs 2006 benchmarks.
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[[simulators:cycle:ppc-pthread]]
A new hook "before_simloop" has been added. If a file named "before_simloop.cxx" exists iun the same folder as the .uni file, it will be included in the generated simulator just before starting the main simulation loop.
A full week tutorial, introducing the basics cycle-level and tlm-level simulation within the UNISIM frameork during the first day; followed by 4 days of hands-on allowing the attendee to build up their first fully functional cycle-level simulator with UNISIM.
Some new hooks "prolog" and "epilog" have been added. If some files named "prolog.cxx" or "epilog.cxx" exists in the same folder as the .uni file, it will be included in the generated simulator at the very beggining and at the very end. Those hooks were created to easily add new command line options in "prolog.cxx", and add some final printing in "epilog.cxx".
Fixed a re-entrance issue with new flex 2.5.33, and enhanced 64-bit support.
A full day tutorial introducing cycle-level simulation with UNISIM during the morning session, and TLM-level simulation for full system simulation during the afternoon.
A full day tutorial will be presented at the 2nd HiPEAC conference on January the 28th 2007 in Ghent, Belgium.\\
In the morning session (from 9:00 to 12:00), we'll introduce cycle-level simulation with UNISIM. In the afternoon session (from 14:00 to 18:00) we'll present an higher level of abstraction: system level simulation with UNISIM.
This release comply with g++-4.1.1 and make-3.81. We also added support for ctrl-c and ctrl-z signal handlings, and for optional ports within modules.
The first HiPEAC tutorial was attended in Barcelona. The tutorial was about learning the basics of the UNISIM framework , and building a DLX structural simulator.
This release includes a few bug fixes for the engine to compile with the more restrictive g++-4.0.2.
A new version of the engine has been relased with the following changes:
* compatibility with liberty has been enhanced with support for userpoints and clock based collectors.
* a few syntax changes has been implemented for a better c++ intergration, and support for named templates has been added to allow easiest module parameterization.
* debugging in generated simulatorw also has been improved, providing a much more detailed:
* port-connection checking with detailed information messages.
* signal checking to verify that every signal is set during a cycle to detect unhandled behaviors.
This new release proposes a few bugfixes from previous 2.0 version, and improves the engine overall speed, optimizing the number of waken-up processes.
A new release of the UNISIM compilation engine has been released with many improvements allowing module parameterization through templates, array of instances, array of ports, and using a two pass compilation allowing to use loops in hierarchical modules.
We started a brand new activity on a higher abstraction level for simulating architecture: System-level simulation. This level of simulation is based on TTLM (Trnasaction Level Modeling with Timing informations). This level of abstraction will allow us to simulate full system at an effective speed, allowing us to simulate operating systems.
We are pleased to announce a new lightweight version of the UNISIM Compilation Process. This new compilation process called unisim_compiler is much simpler to install than the previous one, and much faster, reducing the overall compilation time while debugging a simulator.
The first HiPEAC tutorial was attended in Barcelona. The tutorial was about learning the basics of the UNISIM framework , and building a DLX structural simulator.
We propose the second revision of the UNISIM engine, with a few portability bugs resolved. Such as the path to lm4.
The Subversion repository of UNISIM has been set.
This first revision of the binary distribution of UNISIM allow to build up the binary of a structural simulator, from a modular descrription.